Mill Computing, Inc.
General-purpose CPU architecture with novel instruction set and microarchitecture design
- Sector
- Semiconductors
- Headquarters
- EAST PALO ALTO, CA
- Founded
- 2014
- Latest Form D
- $100K, Apr 2014
- Total capital
- $103K
- Federal grants
- None on recordNo awards found in SBIR/STTR, NIH, NSF or DoD records.
- Private capital raised
- $103K
- 2 Form D · last Apr 2014
- 150 months since last filing
- Federal contracts
- None on recordNo federal contract awards found.
- Granted patents
- 17
- 12 pending · first 2016
- Rank in peer group#39 of 224
Capital timeline
Latest events
- Private capital raisedForm D · SEC · 2nd filing$100K
- Private capital raisedForm D · SEC · 1st filing$3K
Node area is scaled to amount. Form D reports securities sold, which can differ from an announced round; filings are numbered in the order they were made.
Standing among 224 peers
Line = medianSemiconductors · Device
- Granted patents#39 · top 17%
Cumulative measures favor older companies. Rankings describe position today, not outcome. Below the median, ranks show as a band rather than a number.
Founders and team
From SEC Form D filings- Ivan GodardExecutive Officer, DirectorNamed in SEC Form D filings
What it has protected
USPTO · 17 granted of 29- GrantedComputer Processor Employing Operand Data With Associated Meta-DataUSPTOUS 11,226,821
- GrantedComputer Processor Employing Cache Memory Storing Backless Cache LinesUSPTOUS 10,802,987
- GrantedCPU Security Mechanisms Employing Thread-Specific Protection DomainsUSPTOUS 10,678,700
Show all 29 patent records
- Computer Processor Employing Operand Data With Associated Meta-DataJan 18, 2022 · US 11,226,821Granted
- Computer Processor Employing Cache Memory Storing Backless Cache LinesOct 13, 2020 · US 10,802,987Granted
- CPU Security Mechanisms Employing Thread-Specific Protection DomainsJun 9, 2020 · US 10,678,700Granted
- Computer Processor Employing Phases of Operations Contained in Wide InstructionsSep 20, 2018 · Application 15927791Pending
- Computer Processor Employing Bypass Network Using Result Tags for Routing Result OperandsMay 8, 2018 · US 9,965,274Granted
- Computer Processor Employing Double-Ended Instruction DecodingMay 1, 2018 · US 9,959,119Granted
- Computer Processor Employing Instruction Block Exit PredictionJan 23, 2018 · US 9,875,106Granted
- Computer Processor Employing Explicit Operations That Support Execution of Software Pipelined Loops and a Compiler That Utilizes Such Operations for Scheduling Software Pipelined LoopsNov 14, 2017 · US 9,817,669Granted
- Computer Processor Employing Instructions With Elided Nop OperationsOct 10, 2017 · US 9,785,441Granted
- Computer Processor Employing Byte-Addressable Dedicated Memory For Operand StorageAug 29, 2017 · US 9,747,216Granted
- CPU Security Mechanisms Employing Thread-Specific Protection DomainsAug 29, 2017 · US 9,747,218Granted
- Computer Processor Employing Split Crossbar Circuit For Operand Routing And Slot-Based Organization Of Functional UnitsAug 29, 2017 · US 9,747,238Granted
- Computer Processor With Deferred OperationsJun 27, 2017 · US 9,690,581Granted
- Computer Processor Employing Dedicated Hardware Mechanism Controlling The Initialization And Invalidation Of Cache LinesMay 16, 2017 · US 9,652,230Granted
- Computer Processor Employing Hardware-based Pointer ProcessingDec 20, 2016 · US 9,524,163Granted
- Computer Processor Employing Temporal Addressing For Storage Of Transient OperandsDec 6, 2016 · US 9,513,921Granted
- Computer Processor Employing Cache Memory With Per-Byte Valid BitsDec 6, 2016 · US 9,513,904Granted
- Computer Processor Employing Split-stream EncodingDec 6, 2016 · US 9,513,920Granted
- Computer Processor Employing Phases of Operations Contained in Wide InstructionsAug 18, 2016 · Application 14622154Pending
- Computer Processor Employing Phases of Operations Contained in Wide InstructionsAug 6, 2015 · Application 14667404Pending
- Computer Processor Employing Operand Data With Associated Meta-DataJul 23, 2015 · Application 14567820Pending
- Cpu Security Mechanisms Employing Thread-specific Protection DomainsApplication PCTUS2016023420Pending
- Computer Processor Employing Operand Data With Associated Meta-dataApplication PCTUS2014069811Pending
- Computer Processor Employing Cache Memory Storing Backless Cache LinesApplication PCTUS2014060676Pending
- Computer Processor Employing Cache Memory With Pre-byte Valid BitsApplication PCTUS2014060707Pending
- Computer Processor Employing Dedicated Hardware Mechanism Controlling The Initialization And Invalidation Of Cache LinesApplication PCTUS2014060721Pending
- Computer Processor With Deferred OperationsApplication PCTUS2014060661Pending
- Computer Processor Employing Phases Of Operations Contained In Wide InstructionsApplication PCTUS2015023826Pending
- Computer Processor Employing Explicit Operations That Support Execution Of Software Pipelined Loops And A Compiler That Utilizes Such Operations For Scheduling Software Pipelined LoopsApplication PCTUS2015040096Pending
Related companies, and why
- Bridge Semiconductor CorpSimilar federal contract value in Semiconductors · null in contracts
- NextInput, Inc.Similar federal contract value in Semiconductors · null in contracts
- Wise Owl Holdings LLCSimilar federal contract value in Semiconductors · null in contracts
- VUV Analytics, Inc.Similar federal contract value in Semiconductors · null in contracts
- CoolChip Technologies, Inc.Similar federal contract value in Semiconductors · null in contracts
- Mimosa Networks, Inc.Similar federal contract value in Semiconductors · null in contracts
Sources
Federal grants from SBIR/STTR, NIH, NSF and DoD records. Federal contracts from USAspending.gov. Private capital from SEC Form D. Patents from USPTO. Publications from OpenAlex. Regulatory activity from the Federal Register. Press matched on company name.
How to read this page
Figures show associations in public records, not causes or predictions. Nothing here is investment advice. An em-dash means no record was found under this company's name, not that none exists.
Data freshness
SEC Form D filings through . SBIR and STTR awards through .