zGlue, Inc.
active silicon interposer for 3D chiplet integration enabling customizable IoT microelectronic systems
- Sector
- Semiconductors
- Headquarters
- Mountain View, CA
- Founded
- 2014
- Latest Form D
- $4M, May 2018
- Total capital
- $10.9M
- Federal grants
- $150K
- 1 award · 2015
- Rank in peer group#51 of 57
- Private capital raised
- $10.8M
- 2 Form D · last May 2018
- 102 months since last filing
- Federal contracts
- None on recordNo federal contract awards found.
- Granted patents
- 2
- 5 pending · first 2017
- Rank in peer group#10 of 57
Capital timeline
Latest events
- Private capital raisedForm D · SEC · 2nd filing$4M
- Private capital raisedForm D · SEC · 1st filing$6.7M
- Federal grantNSF · Phase I · SBIR Phase I: Smart Chip-System Miniaturization for Internet of Things$150K
Node area is scaled to amount. Form D reports securities sold, which can differ from an announced round; filings are numbered in the order they were made.
Federal first
10months
from zGlue, Inc.’s first federal award to its first private round.
- First federal award · Nov 2015
- NSF · $150K
- First Form D · Sep 2016
- $6.7M · 1st Form D
- Awards before first raise
- 1 award
An association in public records, not a cause or a prediction.
Standing among 57 peers
Line = medianSemiconductors · Device
- Federal grantsBelow median
- Granted patents#10 · top 18%
Cumulative measures favor older companies. Rankings describe position today, not outcome. Below the median, ranks show as a band rather than a number.
Founders and team
Researcher links verified by same-company patents and grants- Jawad NasrullahResearcherExecutive Officer, DirectorLinked by 1 patent · $150K in grants as PI
- Adrian M. RichExecutive OfficerNamed in SEC Form D filings
- Ming ZhangExecutive Officer, DirectorNamed in SEC Form D filings
- Yang MengDirectorNamed in SEC Form D filings
What it has protected
USPTO · 2 granted of 7- GrantedMethods For Automated Hardware System SynthesisUSPTOUS 10,810,336
- GrantedSystem And Methods For Producing Modular Stacked Integrated CircuitsUSPTOUS 9,842,784
- PendingMethod For Creation Of Different Designs By Combining A Set Of Pre-defined Disjoint MasksUSPTOApplication PCTUS2019065779
Show all 7 patent records
- Methods For Automated Hardware System SynthesisOct 20, 2020 · US 10,810,336Granted
- System And Methods For Producing Modular Stacked Integrated CircuitsDec 12, 2017 · US 9,842,784Granted
- Method For Creation Of Different Designs By Combining A Set Of Pre-defined Disjoint MasksApplication PCTUS2019065779Pending
- Over-the-air Hardware UpdateApplication PCTUS2017046165Pending
- System And Methods For Producing Modular Stacked Integrated CircuitsApplication PCTUS2015037233Pending
- Method And Apparatus For Dynamic Routing Using Heterogeneous And Disjoint NetworksApplication PCTUS2018040479Pending
- Assembly Of Flexible And Integrated Module Packages With LeadframesApplication PCTUS2018054885Pending
Related companies, and why
- IMPACT PHOTONICS LLCSimilar federal contract value in Semiconductors · null in contracts
- PIRVISION LENS LLCSimilar federal contract value in Semiconductors · null in contracts
- Eridu CorpSimilar federal contract value in Semiconductors · null in contracts
- MythicSimilar federal contract value in Semiconductors · null in contracts
- FINSCALE INC.Similar federal contract value in Semiconductors · null in contracts
- Mirada Technologies Inc.Similar federal contract value in Semiconductors · null in contracts
Sources
Federal grants from SBIR/STTR, NIH, NSF and DoD records. Federal contracts from USAspending.gov. Private capital from SEC Form D. Patents from USPTO. Publications from OpenAlex. Regulatory activity from the Federal Register. Press matched on company name.
How to read this page
Figures show associations in public records, not causes or predictions. Nothing here is investment advice. An em-dash means no record was found under this company's name, not that none exists.
Data freshness
SEC Form D filings through . SBIR and STTR awards through .