Tenstorrent Holdings Inc.
RISC-V based AI accelerator processors and computing systems
- Sector
- Semiconductors
- Headquarters
- Toronto, ON
- Founded
- 2016
- Latest Form D
- $1.3B, Sep 2026
- Total capital
- $1.5B
- Federal grants
- None on recordNo awards found in SBIR/STTR, NIH, NSF or DoD records.
- Private capital raised
- $1.5B
- 6 Form D · last Sep 2026
- 2 months since last filing
- Federal contracts
- None on recordNo federal contract awards found.
- Granted patents
- 28
- 8 pending · first 2019
Capital timeline
Latest events
- Private capital raisedForm D · SEC · 6th filing$1.3B
- Private capital raisedForm D · SEC · 5th filing$65.8M
- Private capital raisedForm D · SEC · 4th filing$138M
- Private capital raisedForm D · SEC · 3rd filing$20.5M
- Private capital raisedForm D · SEC · 2nd filing$500K
- Offering registeredForm D · SEC · 1st filing$11M
Node area is scaled to amount. Form D reports securities sold, which can differ from an announced round; filings are numbered in the order they were made.
Founders and team
Researcher links verified by same-company patents and grants- LJUBISA BAJICResearcherExecutive Officer, Director, PromoterLinked by 10 patents
- GREG REICHOWDirectorNamed in SEC Form D filings
- IVAN HAMERDirectorNamed in SEC Form D filings
- JAMES KELLERExecutive Officer, DirectorNamed in SEC Form D filings
- JEAN-SEBASTIAN COURNOYERDirectorNamed in SEC Form D filings
- JEAN-SEBASTIEN COURNOYERDirectorNamed in SEC Form D filings
Show all 8 people
- Mike ShaverDirectorNamed in SEC Form D filings
- Milos TrajkovicDirectorNamed in SEC Form D filings
What it has protected
USPTO · 28 granted of 36- GrantedOverlay Layer For Network Of Processor CoresUSPTOUS 12,248,430
- GrantedProcessor Cores Using Content Object Identifiers For Routing And ComputationUSPTOUS 12,236,237
- GrantedOverlay Layer Hardware Unit For Network Of Processor CoresUSPTOUS 12,210,478
Show all 36 patent records
- Overlay Layer For Network Of Processor CoresMar 11, 2025 · US 12,248,430Granted
- Processor Cores Using Content Object Identifiers For Routing And ComputationFeb 25, 2025 · US 12,236,237Granted
- Overlay Layer Hardware Unit For Network Of Processor CoresJan 28, 2025 · US 12,210,478Granted
- Computational Circuit With Hierarchical AccumulatorOct 15, 2024 · US 12,118,060Granted
- Pre-staged Instruction Registers For Variable Length Instruction Set MachineAug 20, 2024 · US 12,067,395Granted
- Processing Core with Meta Data Actuated Conditional Graph ExecutionJul 30, 2024 · US 12,050,913Granted
- Processing Core With Data Associative Adaptive RoundingJul 16, 2024 · US 12,039,289Granted
- Data Structure Optimized Dedicated Memory CachesJun 25, 2024 · US 12,019,546Granted
- Seamless Place And Route For Heterogeneous Network Of Processor CoresApr 16, 2024 · US 11,960,885Granted
- Application Data Flow Graph Execution Using Network-on-chip OverlayMar 19, 2024 · US 11,934,897Granted
- Processor Cores Using Packet Identifiers For Routing And ComputationNov 28, 2023 · US 11,829,752Granted
- Overlay Layer Hardware Unit for Network of Processor CoresAug 22, 2023 · US 11,734,224Granted
- Sparsity Uniformity Enforcement for Multicore ProcessorJul 25, 2023 · US 11,709,662Granted
- Sparsity Uniformity Enforcement for Multicore ProcessorJul 4, 2023 · US 11,693,639Granted
- Processing Core With Data Associative Adaptive RoundingMay 9, 2023 · US 11,645,041Granted
- Pre-staged Instruction Registers For Variable Length Instruction Set MachineMar 7, 2023 · US 11,599,358Granted
- Data Structure Optimized Dedicated Memory CachesDec 6, 2022 · US 11,520,701Granted
- Overlay Layer For Network Of Processor CoresOct 11, 2022 · US 11,467,846Granted
- Processing Core With Operation Suppression Based On Contribution EstimateApr 12, 2022 · US 11,301,264Granted
- Processor Cores Using Packet Identifiers For Routing And ComputationMar 8, 2022 · US 11,269,628Granted
- Speculative Resource Allocation For Routing On Interconnect FabricsFeb 8, 2022 · US 11,245,643Granted
- Processing Core With Metadata Actuated Conditional Graph ExecutionSep 7, 2021 · US 11,113,051Granted
- Processing Core With Data Associative Adaptive RoundingMay 18, 2021 · US 11,010,132Granted
- Processing Core Data Compression And Storage SystemMar 2, 2021 · US 10,938,413Granted
- Processing Core With Metadata Actuated Conditional Graph ExecutionOct 27, 2020 · US 10,817,293Granted
- Processing Core Data Compression And Storage SystemMay 5, 2020 · US 10,644,721Granted
- Processing Core With Operation Suppression Based On Contribution EstimateMar 10, 2020 · US 10,585,679Granted
- Processing Core With Operation Suppression Based On Contribution EstimateJun 11, 2019 · US 10,318,317Granted
- Conditional Graph Execution Based On Prior Simplified Graph ExecutionApplication 62483133Pending
- Package with Top Metal Pad Pitch AdjustmentApplication 63539327Pending
- Network-on-chip Overlay Layer For Network Of Processor CoresApplication 62882065Pending
- Processor Cores Using Packet Identifiers For Routing And ComputationApplication 62863042Pending
- Processing Core With Data Associative Adaptive RoundingApplication 62738286Pending
- Processing Core Data Compression And Storage SystemApplication 62683205Pending
- Processing Core With Metadata Actuated Conditional Graph ExecutionApplication 62491767Pending
- Converged ArchitectureApplication 63546520Pending
Related companies, and why
- Worldwide Antenna Systems LLCSimilar federal contract value in Semiconductors · null in contracts
- SANDBOX SEMICONDUCTOR INCORPORATEDSimilar federal contract value in Semiconductors · null in contracts
- FreeLinc Technologies Inc.Similar federal contract value in Semiconductors · null in contracts
- Directive Systems IncSimilar federal contract value in Semiconductors · null in contracts
- Tactual Labs Co.Similar federal contract value in Semiconductors · null in contracts
- Farrier Microengineering LLCSimilar federal contract value in Semiconductors · null in contracts
Sources
Federal grants from SBIR/STTR, NIH, NSF and DoD records. Federal contracts from USAspending.gov. Private capital from SEC Form D. Patents from USPTO. Publications from OpenAlex. Regulatory activity from the Federal Register. Press matched on company name.
How to read this page
Figures show associations in public records, not causes or predictions. Nothing here is investment advice. An em-dash means no record was found under this company's name, not that none exists.
Data freshness
SEC Form D filings through . SBIR and STTR awards through .