DSGI Technologies, Inc.
Capacitive induction annealing (CIA) system for selective dopant activation in silicon semiconductors
- Sector
- Semiconductors
- Headquarters
- San Jose, CA
- Latest Form D
- $541K, Nov 2011
- Total capital
- $3.2M
- Federal grants
- $1.2M
- 2 awards · 2019–2020
- Rank in peer group#8 of 36
- Private capital raised
- $2M
- 3 Form D · last Nov 2011
- 180 months since last filing
- Federal contracts
- None on recordNo federal contract awards found.
- Granted patents
- 2
- 4 pending · first 2024
- Rank in peer group#9 of 36
Capital timeline
Latest events
- Federal grantEnergy · Phase II · Low Temperature Junction Formation for Image Sensors and Charge-Coupled Devices$1.1M
- Federal grantEnergy · Phase I · Post Thermal Processing by Capacitance Induced Annealing$150K
- Private capital raisedForm D · SEC · 3rd filing$541K
- Private capital raisedForm D · SEC · 2nd filing$624K
- Private capital raisedForm D · SEC · 1st filing$810K
Node area is scaled to amount. Form D reports securities sold, which can differ from an announced round; filings are numbered in the order they were made.
Standing among 36 peers
Line = medianSemiconductors · Instrument
- Federal grants#8 · top 22%
- Granted patents#9 · top 25%
Cumulative measures favor older companies. Rankings describe position today, not outcome. Below the median, ranks show as a band rather than a number.
Founders and team
Researcher links verified by same-company patents and grants- Jeffrey M. KowalskiResearcherExecutive Officer, Director, PromoterLinked by $1.2M in grants as PI
- Dale P. ShipleyDirector, PromoterNamed in SEC Form D filings
- JEFFERY KOWALSKIExecutive Officer, Director, PromoterNamed in SEC Form D filings
- JONG S. WHANGDirectorNamed in SEC Form D filings
- WILLIAM P. MOOREExecutive Officer, Director, PromoterNamed in SEC Form D filings
- William P. Moore IIIDirector, PromoterNamed in SEC Form D filings
What it has protected
USPTO · 2 granted of 6- GrantedSystem And Method Of Low Temperature Thin Film Deposition And In-situ AnnealingUSPTOUS 12,018,374
- GrantedMicrowave Assisted Parallel Plate E-field ApplicatorUSPTOUS 11,924,952
- PendingApparatus For Annealing Semiconductor Integrated Circuit WafersUSPTOApplication 16813251
Show all 6 patent records
- System And Method Of Low Temperature Thin Film Deposition And In-situ AnnealingJun 25, 2024 · US 12,018,374Granted
- Microwave Assisted Parallel Plate E-field ApplicatorMar 5, 2024 · US 11,924,952Granted
- Apparatus For Annealing Semiconductor Integrated Circuit WafersSep 10, 2020 · Application 16813251Pending
- System And Method Of Low Temperature Thin Film Deposition And Insitu AnnealingApplication PCTUS2020021730Pending
- Resonate Field With A Fixed Multimode CavityApplication 62815499Pending
- Low Temperature Thin Film Deposition Insitu Anneal MethodApplication 62815495Pending
Related companies, and why
- OPTICOMP NETWORKS, INC.Similar federal contract value in Semiconductors · null in contracts
- NXBEAM INC.Similar federal contract value in Semiconductors · null in contracts
- MP Technologies, LLCSimilar federal contract value in Semiconductors · null in contracts
- Stone Lock Global, Inc.Similar federal contract value in Semiconductors · null in contracts
- Aeonsemi, Inc.Similar federal contract value in Semiconductors · null in contracts
- Napatech A/SSimilar federal contract value in Semiconductors · null in contracts
Sources
Federal grants from SBIR/STTR, NIH, NSF and DoD records. Federal contracts from USAspending.gov. Private capital from SEC Form D. Patents from USPTO. Publications from OpenAlex. Regulatory activity from the Federal Register. Press matched on company name.
How to read this page
Figures show associations in public records, not causes or predictions. Nothing here is investment advice. An em-dash means no record was found under this company's name, not that none exists.
Data freshness
SEC Form D filings through . SBIR and STTR awards through .